1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly to a redundant decoder of the semiconductor memory device.
2. Description of the Related Art
Memory capacity of semiconductor memory devices has been remarkably increasing. With the increase in the capacity of semiconductor memories, redundant circuit technology has been introduced. The redundant circuit has a redundant row or column of memory cells which are added for a normal memory cell array and a redundant decoder for selecting the redundant row or column of memory cells. If the normal memory cell array contains any defective memory cell or cells in a row or column, the address corresponding to the defective row or column of memory cells into the redundant decoder, thereby replacing the defective row or column of memory cells with the redundant row or column of memory cells. Thus, the defective memory chip is relieved as a functionally good memory chip.
One typical structure of the conventional redundant decoder comprises a multi-input logic circuit such as a NAND or NOR gate, a plurality of address program circuits and a redundancy enable circuit. Each of the address program circuits include a fuse circuit programmable into one of two different states, an address buffer circuit responsive to one of address signals for generating true and complementary signals thereof and a selective transfer circuit for applying one of the true and complementary signals to the multi-input logic circuit according to the programmed state of the fuse circuit. The redundant enable circuit includes a fuse circuit to be programmed into one of first and second states. The first state of the redundant enable circuit enables the multi-input logic circuit to make it responsive to the signals transferred from the selective transfer circuits, while the second state of the redundant enable circuit disenables the multi-input logic circuit to set its output signal at non-selective level irrespective of the transferred signals from the selective transfer circuits. Each of the fuse circuits include a fusible link coupled between two power sources and a DC current flows when the fusible link is not blown out. Accordingly, a relatively large amount of DC current is caused in the redundant decoder through the fuse circuits therein.